The invention relates to logic switching circuitry employing MOSFET devices and in particular relates to an improved MOSFET latching driver circuit operated in the push-pull mode with depletion mode and enhancement mode FET devices.
One reason for the greater performance per unit cost and per unit volume of present day electronic data processing systems has been the advent of the use of MOSFET devices in large scale integrated circuitry. When MOSFET devices are employed, usually the P-channel enhancement mode type of device is used because of its resistance to surface inversion. However, N-channel enhancement mode devices have certain inherent advantages such as higher speed due to a higher change carrier mobility.
A simple bistable circuit can be made by connecting the output of a first inverter to the input of the second inverter and taking the output of the second inverter and connecting it to the input of the first inverter. Bistable driver circuits employing a push-pull driver have been embodied in complementary MOSFET devices, in the prior art. Complementary inverter having an N-channel enhancement mode transistor connected to the negative voltage supply and a P-channel enhancement mode transistor connected to the positive voltage supply have been employed as the basic inverter with the common drain/source, the output node. Common drain output node of the first CMOS inverter is connected to the common gates of a second CMOS inverter and the common drain output of that second CMOS inverter is connected to the common gates of the first CMOS inverter. This forms the basic bistable circuit. A third CMOS inverter has its common gates connected to the common drain output of one of the inverters in the basic bistable circuit so as to form a push-pull output driver for the combined latching driver circuit. In a CMOS inverter, the gates of the transistors are connected together and receive the input signal. When the input signal is negative, the N-channel enhancement mode device is turned off, the P-channel enhancement mode device is turned on, and the output is at the level of the positive supply voltage. When the input signal is positive, the N-channel device is on, the P-channel device is off, and the output is at the level of the negative supply voltage. Such a complementary latching driver circuit provides good switching characteristics and requires only one supply voltage. However, the use of both N-channel and P-channel enhancement devices requires an unusually large amount of surface area on the integrated circuit chip, and also requires several additional processing steps which significantly increases the cost of the circuit.